SoC/ASIC Verification Engineer (SystemVerilog, UVM) — Remote at PyramidCI | Torre
SoC/ASIC Verification Engineer (SystemVerilog, UVM) — Remote
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PyramidCI

SoC/ASIC Verification Engineer (SystemVerilog, UVM) — Remote

PyramidCI
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Full-time

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Remote (anywhere)
Shared by
Agustina Favuzzi
 1 day ago

Responsibilities

We are looking for an experienced SoC / ASIC Verification Engineer with strong hands-on expertise in SystemVerilog & UVM.Must-Have SkillsEnd-to-end UVM experience from scratchTestbench infrastructure developmentUVM Agents, Drivers, Monitors & SequencesScoreboard developmentFunctional & Code CoverageConstrained-random and directed testingDebugging, waveform analysis & regression triageStrong SystemVerilog expertiseGood to HaveExperience with high-speed protocols such as: UCIe 2.0, PCIe Gen 4/5/6, Ethernet (MAC/PCS/PMA)Experience in Networking ASICs, Switches, NICs, or high-performance interconnect designs is highly desirableIf you or someone in your network is a good fit, please DM me or share your updated resume.
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