You have opted out of job matches in .
To undo this, go to the 'Skills and Interests' section of your preferences.
Shared by 
2 months ago
Requirements and responsibilities
SoC Mixed-Signal Verification Engineer with AMS/DMS verification flows; hands-on experience with UVM-MS & full-chip/ASIC mixed-signal validation; exposure to Analog IP verification – ADC/DAC, PLLs, SerDes, PHYs; strong debugging skills across Cadence/Synopsys toolchains. To apply, please share profiles at kanchan.arora@ust.com.
Optionally, you can add more information later (benefits, pre-screening questions, etc.)