Lead SoC Verification Engineer at D2N Solutions

Role Summary We are seeking a hands-on Lead SoC Verification Engineer to own the end-to-end verification of complex SoCs or large subsystems. This role spans testbench architecture, verification strategy, coverage closure, tapeout, and silicon correlation. It is ideal for engineers who thrive on deep technical ownership. 🔹 Key Responsibilities * Architect and build scalable UVM testbenches from scratch for SoC or subsystem verification. * Own testbench architecture, reuse strategy, and maintainability. * Define verification strategy and author test plans based on specifications and micro-architecture. * Develop constrained-random and directed tests, scoreboards, checkers, SVA, and coverage models. * Drive functional, code, and assertion coverage closure. * Debug complex issues using waveforms, logs, and root cause analysis. * Lead SoC-level verification, including IP integration, coherency, low-power, reset and boot, and performance. * Collaborate with RTL, architecture, DFT, and firmware teams. * Support silicon bring-up and pre-silicon and post-silicon correlation. Mandatory Skills * ASICVerification. * SoCVerification. * SystemVerilog. * UVM. * SVA. * TBArchitecture. * CoverageClosure. * AXI. * DDR. * PCIe.

Lead SoC Verification Engineer

Emma

Responsibilities

Skills wanted:

Language(s) required:

Ranjit Kumar Upadhyay

Ranjit Kumar Upadhyay

About D2N Solutions:

mission:

d2nsolutions.com

Admin access needed