Lead ASIC DFT Staff Engineer at ESK Technologies | Torre

Lead ASIC DFT Staff Engineer

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Full-time

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Remote (anywhere)
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21 days ago

Responsibilities


Are you an experienced ASIC DFT professional ready to take ownership of complex SoC DFT challenges? We’re looking for a Lead ASIC DFT Staff Engineer to join our team in a Remote role.What We’re Looking ForStrong hands-on ASIC DFT experience with end-to-end ownershipDeep expertise in Scan, ATPG, MBIST, LBIST, JTAG & Boundary ScanExperience with Synopsys, Cadence & Siemens/Mentor EDA toolsStrong experience in scan insertion, ATPG setup, simulation, debug & DRC analysisMBIST implementation & verification experienceTessent/SSN and scan architecture experience preferredKnowledge of RTL, synthesis, LEC, PLLs & physical design flowsProven post-silicon debug & silicon bring-up experienceExperience with large SoCs, hierarchical DFT & multi-domain integrationTCL/PERL scripting for DFT automation and debugPreferred ExperienceMBIST post-silicon validationATPG fault coverage debugDFT RTL/DFT verificationIP-level DFT integrationDFT SDC & timing closureiJTAGSSNDesign-for-Debugyield learning and manufacturing test optimization