Lead ASIC DFT Engineer at VCENTRIX SERVICES India Pvt. Ltd. | Torre
warning

Heads-up

The job you’re trying to post already exists in Torre:

You'll lead end-to-end DFT for complex ASIC/SoC designs, ensuring robust silicon performance.
Emma highlights
This highlight was written by Emma’s AI. Ask Emma to edit it.
Full-time

Legal agreement: Employment

Provide your expected compensation while applying
location_on
Remote (anywhere)
Match
skeleton-gauges
You have opted out of job matches in .
To undo this, go to the 'Skills and Interests' section of your preferences.
Review preferences
Shared by
Emma of Torre.ai
10 days ago

Requirements and responsibilities


We are seeking a highly skilled Lead ASIC DFT Engineer with deep expertise in end-to-end Design-for-Test (DFT) implementation for complex ASIC/SoC designs.Key Skills:SCAN, ATPG, MBIST, LBISTTiming Simulations, SDF, SDCPattern Retargeting & Pattern PortingDRC Analysis, Diagnosis & DebugJTAG, Boundary Scan, iJTAG, SSNSynopsys TetraMAX, DFTMAX, TessentPost-Silicon Validation & Silicon Bring-UpTCL, Perl, Python ScriptingWhat We're Looking For:10+ years of hands-on ASIC DFT experienceStrong expertise in scan architecture, ATPG, MBIST, fault coverage, and silicon debugExperience with large SoC designs and hierarchical DFT flowsAbility to lead DFT architecture, implementation, verification, and sign-off activities📩 Interested candidates, please share your updated resume at: sakshi@vcentrixservices.com
Optionally, you can add more information later (benefits, pre-screening questions, etc.)
check_circle

Payment confirmed

A member of the Torre team will contact you shortly

In the meantime, continue adding information to your job opening.