Joel Ruiz Quiroz

Design Verification Engineer

Micron

Mar 2025 - Current (1 year 3 months)

• Repair initiatives to address data issues and improve DDR5 reliability. • Responsible for test plan execution, running regressions, developing code for the testbench. • Provide verification support to the DRAM and emerging memory design engineering teams by simulating, analyzing, and debugging pre-silicon full-chip and block-level designs.

Software Enabling and Optimization Engineer

Altera

Jan 2025 - Mar 2025 (3 months)

• Altera Guadalajara Lead PCIe subject matter expert/point of contact. • Contributed to Altera's rebranding focused on PCIe IP documentation during its spin-off from Intel. • Maintained project deadlines and quality by covering roles of four departed team members (2 Senior, 2 Junior) during a resource-constrained period. • Owning support and co-led development and integration of Root Port configurations for PCIe Gen5x8.

Software Enabling and Optimization Engineer

Intel Corporation

Apr 2022 - Dec 2024 (2 years 9 months)

• Subject matter expert experienced in PCIe IP architecture, acting as primary and co-developer for multiple solutions: two soft IPs Gen4x16 and one high-speed hard IP Gen5x16. • Owning support and co-led development and integration of Root Port configurations for PCIe Gen 4x8. • Responsible for PCIe IP collateral including reference designs, documentation & customer escalations. • Experience debugging PCIe workstations, 5.0 LeCroy Analyzer and automation scripts for testing. • Managed PCIe team meetings, engineering cross-functional meetings and mentor 2 junior engineers. • Developed a tool to decode and analyze PCIe Gen 5.0 packets

Pre-Silicon Intern

Synopsys

Sep 2020 - Dec 2021 (1 year 4 months)

• Verification: Developing an environment, driver, monitor and checkers for APB protocol, also developing test and checkers for PCIe Gen 2.0 at the transaction between TLP and DLLP. • DFT: Applying scan insertion and doing ATPG.

Debug Technician

Flex LTD

Nov 2018 - Jul 2019 (9 months)

• Worked in electronics manufacturing, specializing in servers and data center hardware. • Successfully cooperate with FA engineers to maintain optimal workflow. • Performed debugging on computing server PCBAs, both powered (running CentOs) and non-powered systems.

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