• Customer Support experience for DDR IPs, including work with customers to provide technical expertise, troubleshooting, guidance on DDR IP configuration, integration, and verification. Collaboration with internal teams and customers to ensure the successful implementation of DDR solutions in various applications.• ASIC Physical Design experience in full design cycle from RTL to GDSII including flow creation, timing ECOs, STA, EMIR and Power analysis.• Quality Assurance (QA) experience including different IPs final views verification, build and packaging, delivery to customers. Leading and organizing team workflows.• CAD Support skills, including foundry decks setup, tool issues covering and working flows enhancements.• Layout design experience of CMOS Digital Standard Cell and DDR IO Cell libraries.