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Vikram

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ASIC designer with full mixed signal design flow experience.
Seattle, Washington, United States
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Résumé

Jobs verified_user 0% verified
  • Synopsys Inc
    ASIC Design, Staff engineer
    Synopsys Inc
    Feb 2024 - Current (2 years 5 months)
    UVM verification of crypto security IPs. Synthesis of security IPs. Low power design flow.
  • Synopsys Inc
    Asic engineer senior 2
    Synopsys Inc
    Mar 2022 - Feb 2024 (2 years)
    Verification of crypto IPs using UVM
  • Synopsys Inc
    Senior Research And Development Engineer
    Synopsys Inc
    Sep 2010 - May 2018 (7 years 9 months)
    Design, Verification and Layout of Mixed signal design of Non Volatile Memories (ASIC)
  • Virage Logic
    Design Engineer
    Virage Logic
    Jun 2008 - Sep 2010 (2 years 4 months)
    Design, Verification and Layout of Mixed signal design of Non Volatile Memories.
  • Impinj
    Digital Design Engineer
    Impinj
    Sep 2007 - Jun 2008 (10 months)
    Design, Verification and Layout of Mixed signal design of Non Volatile Memories.
  • Impinj
    Jr Product Engineer
    Impinj
    May 2006 - Sep 2007 (1 year 5 months)
    Test and qualify Non Volatile Memories at 180nm, 130nm and 90nm. Debug Silicon on in built testers and commercial testers. Develop tests as per JDEC standards.
  • Indian Institute of Technology
    Research Associate
    Indian Institute of Technology
    Dec 2002 - Jul 2004 (1 year 8 months)
    · Developed a pulsed wire technique to measure low velocity of airflow (design, fabricate and test: various software tools). · Developed measuring and power supplies as well as design of waveguides for the Electron Cyclotron Resonance Source used in large Volume High Density Plasma System (design, fabricate and test: various software tools) (Filed for patent) Major work in this position * Designing analog circuits(power supplies, measuring circuits, sensor circuits) * Designing of highly populated PCBoards. * Designing of testing setups.
  • A
    DSP Engineer
    Accelerated Systems
    Jun 2002 - Nov 2002 (6 months)
    Realized a single phase Power Energy Meter on DSP56805F Motorola with a power line modem (Motorola SDK, MATLAB, CodeWarrior).
  • P
    Student Intern
    Phillips Innovation Campus
    Nov 2000 - Sep 2001 (11 months)
    · Implemented Digital Filter Bank using Discrete Wavelet Transform on TI C54X (TI CCS, MATLAB).
Education verified_user 0% verified
  • Illinois Institute of Technology
    MS, EE
    Illinois Institute of Technology
    Jan 2004 - Dec 2005 (2 years)
  • Karnatak University
    BE, Electronics and Communication
    Karnatak University
    Jan 1997 - Dec 2001 (5 years)
Projects (professional or personal) verified_user 0% verified
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